1141_Digital Logic Design_348864
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Course Intro
Course Resources
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0_9月8日(一)上午1010~1200 新生開學典禮(不上課)
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1_syllabus_LogicDesign
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2_Silde_passwd_ntutld
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3_Ch1
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4_CH1_Assignment
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4-2_Please use stapler to staple your submitted homework if having muliple papers
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5_Ch2
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6_CH2_Assignment
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7_Ch3
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8_CH3_Assignment
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9-1_Ch4
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9-2_Quartus II 8.1 Web Edition_installation_simulation
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9-3_Quartus II 8.1 Web Edition_used_new
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9-5_CH4_Assignment
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Nov.6(Thursday) 1010am_Midterm
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期中考_11月6日(四)_原上課教室(10am先在走廊等候，重新排座位)。範圍_到10月30日內容。
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Nov.3(Mon.) without course
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期中考週_11月3日(一)_不上課，請自行溫書
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10_Ch5
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11-1_Ch5_Quartus II 8.1_VHDL_Majority_Vote
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11-2_CH5_QuartusII_VHDL_Assignment
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12_Ch6
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13_CH6_Assignment
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14_Ch7_wo_passwd
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15_CH7_Assignment
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Final_Exam_Jan.8(Thurs.)_1010am_(CH5~Dec.29)
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Jan.5(Mon.) without course_final-exam_week
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期末考_1月8日(四)_原上課教室(10am先在走廊等候，重新排座位)。範圍_CH5~12月29日內容。
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期末考週_1月5日(一)_不上課，請自行溫書
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[錄] 09111012
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[錄] 09151111
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[錄] 09181012
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[錄] 09221108
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[錄] 10021011
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[錄] 10131110
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[錄] 10161009
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[錄] 10201105
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[錄] 10231010
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[錄] 10271108
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[錄] 10301009
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[錄] 11101109
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[錄] 11131011
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[錄] 11171106
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[錄] 11201011
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[錄] 11241105
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[錄] 11271008
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[錄] 12041012
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[錄] 12111010
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[錄] 12151104
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[錄] 12181010
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[錄] 12291103
Teacher / 王多柏
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